1. Field of the Invention
This disclosure relates to a load driving device and an electrical device using the same, and especially relates to a technique to detect a current by a transistor.
2. Description of Related Art
Conventionally, a technique is known to detect an over current flowing through an output transistor of the load driving device by a detection resistance and to detect a voltage generated across the detection resistance. Also, a technique is known which does not use a resistor and uses another transistor from an output transistor for the detection.
In the patent document 1(Japanese patent publication No. 2009-11112), a construction to detect an over current is illustrated. The construction includes an output current detection resistor utilizing a parasitic resistance of a metal wire connected to the power transistor, and a pair of bipolar transistors Q1 and Q2. The over current detection is performed by a first current mirror circuit to a connection node of which a voltage across the output current detection resistance is applied, a second current mirror circuit to maintain collector currents of a pair of transistors to a predetermined mirror ratio, and a switch element to be turned ON/OFF according to a collector voltage of the transistor Q2.
In the patent document 2(Japanese patent publication No. H4-134271), a technique is proposed to detect an over current as a function to detect an over current circuit to detect a current flowing through an output terminal. The technique is achieved by a comparator to compare a reference voltage and a voltage of the output terminal provided between the output transistor and the load. The reference voltage is generated by a comparing transistor and a constant current power source. Regarding the comparing transistor and the output transistor, each size is different though each characteristic is the same.
In the patent document 3 (Japanese patent publication No. 2004-247834), a construction is disclosed to detect an over current by comparing a A/D converted source-drain voltage (i.e., a voltage across a source and a drain) of a PMOS transistor of an output stage with an over current determination reference voltage.
In the patent document 4 (Japanese patent publication No. H6-30523), an over current protection is performed based on a control for a gate voltage potential of a switch. The gate voltage potential is controlled by a transistor. A conduction level of the transistor is controlled based on a source-drain voltage potential (i.e., a voltage across a source and a drain) of the switch which cuts off a power source from a motor driver.
As a resistance for the over current detection is realized by the wire resistance component parasitic to a metal wire, the patent document 1 has a problem of an increase of a chip cost.
A voltage almost equals to an output voltage is applied to an input terminal of the comparator, the over current protection circuit of the patent document 2 is not suitable for circumstance which deals with a high voltage.
Though an over current detection is performed based on a comparison between a source-drain voltage with a reference voltage, there is a problem in the patent document 3 that a circuit construction is complicated because of using a subtraction circuit for calculating the source-drain voltage.
As using a resistance or a capacitor to construct a circuit for detecting the source-drain voltage and cutting off the over current, the patent document 4 has a problem of an increase of a circuit scale.